December 6, 2021

Process Of Compiling And Linking

If we compare the step by step design process for microprocessors and FPGAs, we will see that there is a large difference between compiling and synthesizing, and we need to stretch some to encompass it. Whereas the compiler produces bits to control fixed-gate patterns (the microprocessor decoders, registers, arithmetic logic unit, and so on) the synthesizer defines gate patterns described by the logic of the program.

This means that your program logic gets synthesized, or mapped not into instructions that control multigate structures but into logical gates. It is considered by good FPGA programmers that it is a luck to have the blessing to live in the rare time in history (post 1990+) when they can design architectures with words and then synthesize their logic into (mostly silicon) gates that execute their logic. This is a wonderful fact. Compared with others, linking was a latecomer. It came in 1950. Before it, computers and programs simply put bits into console switches, and thereby into registers.

According to programmers, the bit-based outputs of the microprocessor compilation process must be connected to other bit patterns though they typically do not directly control gates. It is a general fact that most programs run under the control of an operating system and must be connected, or linked, to the operating system. In fact, the location in memory of the actually compiled bits is usually unknown and not determined until linking and loading are completed. Also, experts who explain FPGA, VHDLand related topics are of the opinion that there may be programs existing in a library that must also be linked to the compiled program before a useful product exists.

The synthesis process for microprocessors and FPGAs produces bit patterns, in an intermediate format. Experts compile Verilog to RTL netlists, then synthesize Verilog to EDIF, then place and route EDIF to produce HEX or TTF files that can be loaded into an FPGA. These bit patterns will end up controlling logic gates and filling memory and registers. According to experts who explain FPGA VHDL and related issues, in the same way, that C and other programs include objects defined in (possibly third-party) libraries, FPGA programs can include or import portions of systems from third-party intellectual property, in the form of FPGA-implementable programs or objects.

There are a lot of things to know on this matter such as in the same way that the linking and loading process of embedded systems design connects various system objects, subsystems, or super systems like the operating system, including library objects (and loads or places them into specific memory locations), the place and route function in FPGA design places the synthesized subsystems into FPGA locations and makes connections (microprocessor links ~ FPGA routes) between these subsystems, enabling their operation as an integrated system.

The actual linking and loading of compiled bits is essentially a process of fitting, in one dimension, the bit patterns distributed over a set of available linear memory addresses. It is explained by experts that the FPGA place and route process fits, in two dimensions, the bit patterns (logic subsystems) over a two-dimensional array of available logic gates, and routes buses between these logic subsystems as necessary.

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